Ryzen 9000 Core Frequency Bugfix (#1548)
* Ryzen 9000 Core Frequency Bugfix Zen5 (Ryzen 9000) has a changed register mapping for readout core frequency * Update Ryzen 9000 and Core Clock * fixed Package Power and Core power Calculation, use ESU for power scaling * Changed DateTime.Now to UtcNow (better performance) * Added Effective core clock * Added Average Core clock and Average effective clock * Remove Effective clock from SMU Core effective clock is now calculated in Amd17Cpu/Core * Fix Clock Ratio calculation. Ratio > 1 is not possible * Update Amd17Cpu.cs --------- Co-authored-by: PhyxionNL <7643972+PhyxionNL@users.noreply.github.com>
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sebastian-dev committed
342c4f5f52399c946404f0aa48d9114898c73cb6
Parent: 8d612d2
Committed by GitHub <noreply@github.com>
on 2/4/2025, 3:43:51 PM