Fix the ARM64 system register encoding in the msr_read note

The note told module authors to build the instruction word as

  0xD5300000 | (op0 << 19) | (op1 << 16) | ...

but bit 19 is o0, and op0 is 2 + o0. op0 is architecturally 2 or 3, so
op0 << 19 sets bits 20 and 21 and clobbers the opcode field: op0 = 3
gives 0xD5480000, which the validator masks to 0xD5400000 and rejects.
Every ARM64 msr_read/msr_write written from the documented recipe
returned STATUS_INVALID_PARAMETER. The implementation is correct.

msr_write refers back to this encoding, so it is covered too.