[XPU][Aten] Fix memory format detection for conv backward overrideable (#194328)

Currently, the XPU implements conv1d through oneDNN conv2d by viewing 3D tensors as 4D tensors. `convolution_backward_overrideable` selected the memory format before applying this viewing and converted all tensors to that format. The detail implementation then re-detected the memory format from the converted 4D tensors when creating memory descriptors.

For some singleton-dimension layouts, 3D and 4D format detection differs, causing oneDNN use mismatched layout tags and produce incorrect backward results.

For example, a 3D input with `shape=[2, 4, 1]` and `stride=[8, 1, 4]` suggests a contiguous layout. After it is viewed as a 4D tensor with `shape=[2, 4, 1, 1]` and `stride=[8, 1, 4, 4]`, it instead suggests a channels-last layout.

This PR fixes the https://github.com/intel/torch-xpu-ops/issues/4906

Pull Request resolved: https://github.com/pytorch/pytorch/pull/194328
Approved by: https://github.com/Skylion007, https://github.com/guangyey

Co-authored-by: Yu, Guangye <guangye.yu@intel.com>