[CUDA] Fix FP8 min/max codegen (#3047)

[CUDA] Add FP8 min/max overloads

CUDA codegen emits unqualified min/max calls for TIR MinNode and MaxNode
expressions. FP8 operands promote to float, but the FP8 wrappers have no
implicit conversion back from the result, so T.max, T.min, and T.clamp
failed during nvcc compilation.

Add tl::min/max overloads for float_e4m3_t and float_e5m2_t. The overloads
compute through fminf/fmaxf and convert the result back to FP8. ADL lets the
existing scalar and per-lane vector codegen resolve these overloads without
FP8-specific codegen branches.

Add runtime coverage for both FP8 formats and compile coverage for vectorized
expressions and the e4m3fn spelling.

Fixes #2985