fix(cache): sibling-lane memory-wave discipline + idle-rederive exemption

Post-release deep audit (two Fable source sweeps over the five API dialects
and the three cache-tier configs) found two residuals of the just-fixed
defect families, both in sibling lanes of the proven fixes:

1) Scheduler._prefill_for_prompt_only_cache -- the batched twin of the MLLM
   clean-prefill loop -- had per-chunk mx.eval but no per-chunk
   mx.clear_cache(). The MLLM loop got that in e8b2b6087 after retained
   chunk transients stacked into the memory wave that killed the serve
   process; this lane runs the same post-turn work for ZAYA / mixed-SWA /
   MiniMax-M3 deferred clean stores and the hybrid-text idle rederive.

2) run_idle_rederive stored companions WITHOUT the positional-latent
   exemption (the fourth store site missed by 1c282ae23), overwriting the
   exemption-correct entry the clean pass had just stored at the same key
   -- shifting the fetch splice's sequential slot fill on models with
   interleaved exempt slots and re-opening the O(ctx)-per-checkpoint
   companion growth -- and double-storing a 50-200MB clone + disk
   write-through every time it ran. It now skips entirely when the clean
   pass already stored (has_complete probe) and filters exempt slots when
   it does store.

Tests: source pin on the batched loop's per-chunk clear; behavior tests for
the rederive dedupe and exemption filtering.