all: REVERSE MERGE dev.simd (0ac6a67) into master

This commit is a REVERSE MERGE.
It merges dev.simd back into its parent branch, master, for 1.27.

Merge List:

+ 2026-05-26 0ac6a67fbb [dev.simd] all: merge master (39c00b1) into dev.simd
+ 2026-05-26 9816f3ec4a [dev.simd] internal/buildcfg: disable SIMD experiment by default for merge to master
+ 2026-05-26 5b07ed8bfa [dev.simd] simd: cmd/compile: add wasm "Swizzle" SIMD operation
+ 2026-05-26 5db690032c [dev.simd] simd: fix wasm bug; size was already 32
+ 2026-05-26 c73b7f56e8 [dev.simd] simd: update _gen/main.go and simdgen/main.go to work better
+ 2026-05-25 56355bb195 [dev.simd] simd: fix the operation sort order in wasm; it was broken
+ 2026-05-23 4b37aa2bc1 [dev.simd] all: merge master (bfbbe96) into dev.simd
+ 2026-05-22 3a6e136c90 [dev.simd] simd: add ARM64 NEON saturating, pairwise, and bit-count intrinsics
+ 2026-05-22 f6490657e7 [dev.simd] simd: add ARM64 NEON horizontal reduction intrinsics
+ 2026-05-22 d2a9f4e364 [dev.simd] simd: add ARM64 NEON shuffle intrinsics (Interleave/Deinterleave/Transpose)
+ 2026-05-22 e1f7a41d0e [dev.simd] simd/archsimd/internal/simd_test: test InterleaveLo/Hi
+ 2026-05-22 da9cdfcbc0 [dev.simd] simd: add ARM64 NEON ConcatShiftBytesRight intrinsic
+ 2026-05-22 edc3b161cb [dev.simd] cmd/compile: mark AVX512 high registers and mask registers callerSave
+ 2026-05-22 b15400c775 [dev.simd] cmd/compile: mark Wasm vector registers callerSave
+ 2026-05-22 c2f3871e15 [dev.simd] simd: add ARM64 NEON arithmetic, rounding, and min/max intrinsics
+ 2026-05-22 1768c11712 [dev.simd] simd: add ARM64 NEON TBL/TBX table lookup intrinsics
+ 2026-05-21 ae7bac0a4b [dev.simd] simd: add ARM64 NEON comparisons, Masked/IfElse, and helper intrinsics
+ 2026-05-21 c473f30297 [dev.simd] simd: add ARM64 NEON bitwise logic intrinsics
+ 2026-05-21 43df7ba2f5 [dev.simd] simd: add ARM64 NEON conversion intrinsics
+ 2026-05-21 6a8b351af9 [dev.simd] simd: support ARM64 NEON narrow and long intrinsics
+ 2026-05-21 9a0be0742b [dev.simd] cmd/internal/obj/arm64: add ASIMD convert, long, and saturating narrow instructions
+ 2026-05-21 3ea9804aef [dev.simd] simd: add ARM64 NEON SetHi/GetHi methods
+ 2026-05-21 39b11f4b14 [dev.simd] simd: add ARM64 NEON shift intrinsics
+ 2026-05-21 098d688071 [dev.simd] simdgen: add argsMatchRule for broadcast-to-VMOVI folding
+ 2026-05-21 ae1c21739d [dev.simd] simd: add ARM64 NEON Broadcast and String helpers
+ 2026-05-21 399bc412ae [dev.simd] simd: add ARM64 NEON support for partial slice operations
+ 2026-05-20 61a10105e6 [dev.simd] tmplgen: add ARM64 SIMD test generation support
+ 2026-05-20 d62d649e1a [dev.simd] simd: add GetElem and SetElem for ARM64 vectors
+ 2026-05-20 b84139dfad [dev.simd] simdgen: add ImmMax to limit immediate jump table size
+ 2026-05-20 581c1b1081 [dev.simd] cmd/compile: set simdRegMask for ARM64
+ 2026-05-20 f4d50e5ebf [dev.simd] simdgen: detect SetElem greg width from element width
+ 2026-05-20 951257bd14 [dev.simd] simd: reorganize simdgen YAML configs by architecture
+ 2026-05-19 8742584113 [dev.simd] simd, cmd/compile: add WASM SIMD
+ 2026-05-19 8a1b0c8ecb [dev.simd] simd, cmd/compile: generalize simdgen and add initial ARM64 NEON intrinsics
+ 2026-05-18 e115b2f987 [dev.simd] simd: change amd64 to support IfElse, not Merge
+ 2026-05-18 62a53580b1 [dev.simd] simd: repair sub-par method/template names in intrinsics
+ 2026-05-13 59d8c128ef [dev.simd] cmd/compile: updated names in intrinsic registration
+ 2026-05-12 e918628cdf [dev.simd] simd: update testdata/sample.go for renamed load/store APIs
+ 2026-05-12 6639f3b4d8 [dev.simd] simd, cmd/compile: change Select(128)?FromPair names
+ 2026-05-12 ff13ea4145 [dev.simd] simd, cmd/compile: rename (Add|Sub)Pairs* to Concat(Add|Sub)Pairs*
+ 2026-05-12 9bc619add4 [dev.simd] simd, cmd/compile: change RoundToEven to Round
+ 2026-05-12 acbbcf61df [dev.simd] simd, cmd/compile: change some shift documentations
+ 2026-05-12 f844b5eb8b [dev.simd] simd/archsimd/_gen/unify: speed up environment expression pruning
+ 2026-05-12 3c60677325 [dev.simd] simd, cmd/compile: reorder some shift op orders
+ 2026-05-12 a9ed6afb90 [dev.simd] simd, cmd/compile: unexport broadcast1ToN
+ 2026-05-12 fd0b2281ee [dev.simd] simd: remove stray "LoadSlice" from generated amd64 doc comment
+ 2026-05-11 edf37149c3 [dev.simd] simd: repair go.mod and import paths
+ 2026-05-11 99e5c632bd [dev.simd] simd: rename CarrylessMultiply
+ 2026-05-09 4a1c0efa83 [dev.simd] cmd/compile: fix latent regalloc bug
+ 2026-05-08 3d6c5301df [dev.simd] simd: for amd64, deprecate As conversions, add factored
+ 2026-05-08 60b0cc23d6 [dev.simd] simd: add directory of useful generation stuff
+ 2026-05-08 ec5b41b314 [dev.simd] simd: refactor LoadTPart to also return the number of elemes loaded
+ 2026-05-08 d3a3061d75 [dev.simd] simdgen: auto-merge simdgenericOps.go
+ 2026-05-08 b70242b3b9 [dev.simd] simd, cmd/compile: rename loads and stores
+ 2026-05-08 9076ed8750 [dev.simd] cmd/compile: add arm64 helpers for GOEXPERIMENT=simd
+ 2026-05-08 8437d1b188 [dev.simd] simd: add arm64 XML specification parser for simdgen
+ 2026-05-07 5b010c3340 [dev.simd] simd/archsimd: regenerate
+ 2026-05-07 39b20d32a9 [dev.simd] simd/archsimd: fix several "shift" issues, tests, docs
+ 2026-05-07 59740699ed [dev.simd] simd/archsimd: rename CopySign to MulSign
+ 2026-05-07 f6c3137899 [dev.simd] simd/archsimd: more sensible result type for SumAbsDiff
+ 2026-05-07 cb4f10f62f [dev.simd] simd/archsimd: no-op simplification of Permute rules
+ 2026-05-07 c072aae77f [dev.simd] simd/archsimd: many small documentation tweaks
+ 2026-05-06 e91b86b2f3 [dev.simd] simd/archsimd: no-op doc generation change
+ 2026-05-06 6f75386281 [dev.simd] simd/archsimd/_gen: more guidance in output
+ 2026-05-04 fdbd2e871a [dev.simd] all: merge master (f6664a0) into dev.simd
+ 2026-05-01 acc4bad854 [dev.simd] cmd/compile: add optimizations for all the AVX512 mask operations
+ 2026-04-28 3b2c371844 [dev.simd] cmd/internal/obj: add vector ops to WASM asm
+ 2026-04-28 923c23ea10 [dev.simd] simd: add signed Int Neg() and Mask String() methods for amd64
+ 2026-04-28 cb884c6552 [dev.simd] cmd/compile, simd: disambiguate some architecture-specific SIMD files
+ 2026-04-23 e7ec26cf8f [dev.simd] cmd/compile: make X/Y/Z16-31 allocatable
+ 2026-04-21 c9fae72dbd [dev.simd] all: merge master (8678b2d) into dev.simd
+ 2026-04-17 6fb7a1cddd [dev.simd] cmd/compile: do not include zero-valued fields in simdAMD64ops.go
+ 2026-04-16 8fad825fe1 [dev.simd] all: merge master (f3bb0f4) into dev.simd
+ 2026-03-24 9abe2e1903 [dev.simd] all: merge master (918644a) into dev.simd
+ 2026-02-26 9922fb1d24 [dev.simd] simd/_gen: add asmRule for patterns on asm instruction
+ 2026-02-19 c6624b4574 [dev.simd] all: merge master (839cd82) into dev.simd
+ 2026-02-05 c7fed112a9 [dev.simd] all: merge master (99d7121) into dev.simd
+ 2026-01-13 096a80ff51 [dev.simd] simd/archsimd: 128- and 256-bit FMA operations do not require AVX-512
+ 2026-01-13 d8720e1c29 [dev.simd] simd/archsimd/_gen/simdgen: feature implications
+ 2026-01-02 4a702376b7 [dev.simd] all: merge master (e84983f) into dev.simd
+ 2025-12-18 3132179209 [dev.simd] all: merge master (cfc024d) into dev.simd
+ 2025-12-10 29842d6b23 [dev.simd] simd/archsimd: rename Mask.AsIntMxN to Mask.ToIntMxN
+ 2025-12-10 63d1eec2bb [dev.simd] simd/archsimd: define ToMask only on integer vectors
+ 2025-12-09 636119f3d0 [dev.simd] simd/archsimd: add package doc
+ 2025-12-09 c87e344f7a [dev.simd] internal/buildcfg: turn GOEXPERIMENT=simd back on

Change-Id: I0a4fa9e14ec512897c0fad520babd95ed7e9a744